"What is PicoClaw's defining architectural contribution?"	Hardware-native tools: i2c, spi, serial tools that let the agent directly read sensors and drive peripherals on physical hardware. The ONLY harness in the roster with this capability. From Sipeed (RISC-V/AI-camera hardware company).	harness-engineering::dd17::recall
"What language is PicoClaw and what hardware does it target?"	Go single-binary. Cross-compiles to x86_64, ARM64, MIPS, RISC-V, LoongArch. Runs on $10 SBCs (Sipeed LicheeRV Nano, MaixCAM). Co-branded LicheeRV-Claw board sold on AliExpress. Android APK also shipped.	harness-engineering::dd17::recall
"How does PicoClaw's memory architecture work?"	Two-tier: short-term = append-only JSONL (messages never physically deleted, TruncateHistory bumps skip offset, 64 sharded mutexes for concurrency, crash-safe). Long-term = hand-edited workspace/memory/MEMORY.md. Context trimming at Turn boundaries (never splits tool_call/result pairs). Ships LoCoMo benchmark.	harness-engineering::dd17::recall
"Why is PicoClaw described as 'thin agent kernel, thick ecosystem'?"	Kernel: tiny Markdown prompts (SOUL.md 351 bytes, AGENT.md 1278 bytes), ~22 tools, append-only JSONL. Ecosystem: 20+ channels, 10+ providers, MCP client, skills marketplace, subagents, cron, hooks, React dashboard, voice, WebRTC. Thin at runtime, thick in codebase (~218k LOC).	harness-engineering::dd17::analysis
"What is the MaixCAM channel?"	A TCP-socket channel for Sipeed MaixCAM AI cameras. MaixCAM sends image frames; PicoClaw analyzes them using vision models. The agent acts as a vision/IoT backend on the hardware.	harness-engineering::dd17::recall
"What is PicoClaw's relationship to OpenClaw and NanoBot?"	NOT a fork. Explicitly states independence. 'Inspired by' HKUDS/nanobot (4k-LOC Python agent). Ships an OpenClaw migration tool in-repo (pkg/migrate/sources/openclaw/) — actively pulling users from the heavyweight flagship.	harness-engineering::dd17::analysis
"What are PicoClaw's security gaps?"	Pre-1.0 (v0.2.9). README warns 'do not deploy to production.' macOS isolation NOT implemented. Main process unsandboxed. 'There may be unresolved security issues.' Hardware tools (I2C/SPI) need ZeroClaw-level autonomy gating — confirm gate on writes is necessary but insufficient.	harness-engineering::dd17::analysis
"What is the honest <10MB RAM claim?"	The README itself now hedges: 'Recent builds may use 10-20MB RAM. Resource optimization is planned after feature stabilization.' Boot is still sub-second on 0.6GHz hardware. But memory optimization hasn't happened yet.	harness-engineering::dd17::recall